Conventional electronic systems for computation, communication, and other applications are typically built up from integrated circuits (ICs) arranged in packages or chips and connected to power supplies, circuit elements and other ICs in separate packages or chips by way of wiring traces on printed circuit boards. Each IC requires connections through the package for power and electrical ground returns, as well as other package connections, which can include both low-rate control signals and relatively high-rate data signals.
The rate of increases in on-circuit density and operating frequency of high-performance ICs have exceeded the rate of increase in interconnections available between packages and printed circuit boards. The availability of parallel busses built from extremely dense interconnect wiring within an IC enables a greater number of data bits to be communicated from one circuit element to another circuit element (in the IC) than the number of data bits that can be communicated by the relatively lower number and larger scale data interconnections available between the package and the printed circuit board. Because the interconnect density between package and printed circuit board is much lower than on-chip interconnect density, typical implementations of high-performance computing and communication chips include complex serialization-deserialization circuitry associated with high-speed I/O ports to multiplex and demultiplex signals from the higher density data paths within the IC across a significantly lower number of package-to-board connections. To communicate or transfer data efficiently, chip-to-chip or off-chip communication data rates have to increase even more rapidly than on-chip clock rates.
High speed serialization-deserialization circuit blocks require additional transistors, consume chip area, and power, and can generate potentially significant levels of noise on power and data connections. Moreover, the off-chip data rates required to supply the on-chip information capacity demand lead to unavoidable high-frequency attenuation in the chip-to-package-to-printed-circuit-board channels. Thus far, system designers have employed increasingly more complicated predistortion and signal recovery techniques to compensate for the high-frequency signal power losses in these channels. Despite continuous efforts to improve the speed and power efficiency of serialization-deserialization techniques, and to further increase package interconnection density, the printed-circuit-board-to-package interconnections are projected to present a bandwidth bottleneck that will increasingly limit future high-performance electronic computing and communication systems.
In addition to the above-described bottleneck, any alternative to the conventional chip-in-package-on-board configuration must satisfy additional constraints that result from the conventional high-performance IC. Accordingly, such alternative configurations must also provide thermal-expansion compliant interfaces, low-impedance, electro-migration compliant power and ground connections, and efficient mechanisms for transferring heat energy away from the high-performance IC.
One method with potential to eliminate the bottlenecks caused by IC-package-board-package-IC data communication channels involves vertically stacking ICs and using through-silicon vias and dense arrays of electrically conductive signal paths. However, such alternative configurations, with several vertically arranged high-performance ICs, would suffer from severe problems with heat removal from the interior of the resulting stack. In addition, a vertical arrangement of high-performance ICs would have difficulty providing electro-migration compliant power supply feeds for each of the high-performance ICs within the available area at the base of a stack of high-performance ICs.
Another possible solution is to arrange the high-performance ICs laterally and to interconnect them with a “silicon circuit board.” Unlike a conventional organic laminate printed circuit board or even a higher performance laminate or ceramic multichip module substrate, a silicon circuit board is composed of the same materials and fabricated with the same technology as the ICs. Therefore, the conductors of a silicon circuit board have density and signal integrity similar to the conductors on the high-performance ICs.
Though silicon circuit boards have been proposed and demonstrated they suffer several drawbacks. One is that, being made with the same equipment, a silicon circuit board is limited to about the same size as the largest ICs it might support by the exposure field size of the photolithographic step-and-repeat camera. Though exposure fields can be stitched together over larger areas, this process is slow and not commonly available. A more fundamental problem is that IC-type conductors tend to delaminate from their silicon substrate when they are used for distances as long as the width of several chips due to thermal expansion mismatch between the silicon and the conductor material.